an innovative design rights management technology for any type of hardware

Algodone proposes an innovative technology to control the legitimate use of digital content associated with an IP block or a circuit.

It is instrumented in different steps of the design process and the manufacturing or programmation of IC chips.

It offers a clear monetization strategy for any hardware providers. The Algodone solution is available on both ASIC and FPGA technologies.

Microelectronic integrated circuits combine more and more predefined blocks that are provided by specialist suppliers. These blocks (called " IP semiconductor design " or " IP blocks ") are provided as reusable and virtual circuit description files which are incorporated into the final design of a microelectronic product. The latter are essentially built-up with such IP blocks (60 to 70% currently) which come from about fifty providers worldwide.

A complete monetization strategy, highly flexible and an efficient anti-counterfeiting tool

This technology concerns both activation of IPs in a circuit, as a system or a complete chip through hardware authentication and license.

It can be extended in order to fit in any industrial area requiring hardware identification (smart grid, industrial network, etc.) and a secure control of data flow.

It can be integrated too in set top box to strongly reinforce the security of TV, audio or video streaming cyphering.

IPs block hierarchy is supported and different activation modes (static or dynamic) are available as well as several security modes to meet any current DRM concern of chip makers and electronic devices manufacturers.

A DNA concept

With Algodone, any chip unit contains a model of the “smart lock” IP of Algodone, that locks by default the access controls of the chip or its IPs. That block makes the chip unique through a DNA hardware equivalent that provides a unique signature at runtime (based on the manufacturing process variations). Activated at runtime, through a unit chip-dedicated license, this permits a fine-grain counting to fully manage any design rights of protected elements (IPs, chips, etc.).